PLDs are flexible electronic devices that allow users to change or program the functionality of the device as desired. To accommodate the users' increasingly complex designs, modern PLDs include a relatively large number of transistors. At 90 nm process technologies and beyond, power consumption, power dissipation, die temperatures and, hence, power density (power dissipation in various circuits or blocks), of PLDs has become an increasingly important issue.
As transistor threshold voltages have scaled to maintain speed advantages over the previous process node, the transistors have exhibited higher sub-threshold leakage. The DC leakage problem is even worse for relatively large dies, as used for PLDs, because of the relatively large number of transistors. A need therefore exists for managing power consumption in PLDs.